计算机科学 ›› 2017, Vol. 44 ›› Issue (4): 66-71.doi: 10.11896/j.issn.1002-137X.2017.04.014

• NASAC 2015 • 上一篇    下一篇

设备自动巡检控制逻辑的层级时间自动机建模与验证

孙程,邢建春,杨启亮,韩德帅   

  1. 解放军理工大学国防工程学院 南京210007,解放军理工大学国防工程学院 南京210007,解放军理工大学国防工程学院 南京210007;计算机软件新技术国家重点实验室南京大学 南京210093,解放军理工大学国防工程学院 南京210007
  • 出版日期:2018-11-13 发布日期:2018-11-13
  • 基金资助:
    本文受江苏省自然科学基金(BK20151451),装备预先研究基金(9140A06050215JB25091),计算机软件新技术国家重点实验室(南京大学)开放课题(KFKT2014B12)资助

Modeling and Verifying Device Automatic Polling Control Logic Using Hierarchical Timed Automata

SUN Cheng, XING Jian-chun, YANG Qi-liang and HAN De-shuai   

  • Online:2018-11-13 Published:2018-11-13

摘要: 地下建筑工程中的设备系统经常处于静止状态,为保证其在需要时能安全可靠地运行,需对设备进行定期的自动巡检。在自动巡检的过程中,设备自动巡检控制逻辑起到了举足轻重的作用。为了解决复杂的设备自动巡检控制逻辑造成的一系列问题,之前提出了一种层级有限自动机(HFA)的形式化模型,并利用HFA对设备自动巡检控制逻辑实现了行为建模,但并未添加时间属性,也未验证其正确性与可靠性。现提出一种层级时间自动机形式化模型,并利用它对设备自动巡检控制逻辑进行建模,再利用UPPAAL对其进行分析与形式化验证,分别验证其安全性、可达性、活性及时间约束,以此来确保其时效正确性与可靠性。这种建模与形式化验证方法弥补了之前无时间约束的漏洞,有效确保了设备自动巡检控制逻辑的正确性与可靠性。最终,该模型通过了模拟和验证,这充分证明了设备自动巡检控制逻辑是正确可靠的。

关键词: 自动巡检,层级时间自动机,UPPAAL,模型检测

Abstract: The device systems in the underground construction are often dormant.In order to ensure they can operate securely and reliably when they are needed,it is necessary to poll automatically on the devices at a regular interval.In the automatic polling process,the device automatic polling control logic is of great importance.To solve these problems which are caused by device automatic polling control logic,one formal model of hierarchical finite automaton(HFA) was set up and discussed previously,and modeled for device automatic polling control logic with HFA.But we didn’t add time constraints and verify its accuracy and reliability.This paper proposed a formal model of hierarchical timed automata and modeled with it to the device automatic polling control logic.Then we analyzed and carried out formal verification with UPPAAL to the model.We verified its safety,reachability,activation and time constraint respectively to make sure the accuracy of timeliness and reliability.The method of modeling and formal verification makes up the disadvantage without time constraints in the former and ensures the accuracy and reliability of the device automatic polling control logic effectively.Finally,this model passes the simulation and formal verification,which proves the device automatic polling control logic is correct and reliable.

Key words: Automatic polling,Hierarchical timed automata,UPPAAL,Model checking

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