Computer Science ›› 2018, Vol. 45 ›› Issue (3): 305-310.doi: 10.11896/j.issn.1002-137X.2018.03.050

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Research on Fault Tolerant Technology for Networks-on-Chip

LI Lu-lu, QIU Xue-hong, ZHOU Duan and ZHANG Jian-xian   

  • Online:2018-03-15 Published:2018-11-13

Abstract: Network-on-chip is a new computer architecture on chip,the study of network-on-chip mainly includes topo-logical structure,routing algorithm,service quality,switching mechanism,congestion avoidance,energy consumption,fault tolerant and so on,and the study of fault tolerant methods is the most important research issue.This paper divided fault tolerant methods into two types:tolerant fault by algorithms and tolerant fault by architecture, from the aspects of software improvement and hardware improvement.This paper analyzed the application conditions,implementation principles and implementation methods of the existing falut tolerant routing algorithms,analyzed the performance of communication latency,throughput and power consumption,and advantages and disadvantages of the existing falut tolerant methods,dissected the situation of the existing falut tolerant methods and offered a possible research orientation.

Key words: Network-on-Chip,Falut tolerant,Routing algorithm,Performance analysis

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