计算机科学 ›› 2014, Vol. 41 ›› Issue (5): 59-63.doi: 10.11896/j.issn.1002-137X.2014.05.013

• 2013容错计算 • 上一篇    下一篇

一种面向多核的可重构容错方法

张绍林,杨孟飞,刘鸿瑾,姜宏,王若川   

  1. 北京控制工程研究所 北京100190;北京控制工程研究所 北京100190;北京控制工程研究所 北京100190;北京控制工程研究所 北京100190;北京控制工程研究所 北京100190
  • 出版日期:2018-11-14 发布日期:2018-11-14
  • 基金资助:
    本文受国家十二五民用航天项目:基于SoC的航天器可重构控制系统一体化技术资助

Reconfigurable Tolerance Method for Multi-processor System

ZHANG Shao-lin,YANG Meng-fei,LIU Hong-jin,JIANG Hong and WANG Ruo-chuan   

  • Online:2018-11-14 Published:2018-11-14

摘要: 随着二代导航、载人航天、深空探测等空间应用对星载电子产品的低功耗和抗辐射容错能力提出更高的需求,传统多机冗余设计星载计算机面临着亟需进行设计升级换代。将可重构技术应用到多核片上系统的设计中,提出了一种基于动态可重构的容错体系结构,在硬件层提高系统的容错能力和扩展性对未来空间工程应用具有重要意义。首先介绍了多核片上系统和可重构技术的基本概念,简要分析了国际宇航可重构系统的研究案例。随后提出了一种基于动态可重构的容错体系结构,即通过基于系统降级的重构策略来实现系统级容错。在方案验证环节,采用LEON3作为处理单元,对容错模块功能进行了仿真验证。仿真结果表明,容错控制满足预期的设计需求。最后对后续工作做了简要规划,并对可重构容错方法设计进行了总结。

Abstract: Because of advancing space applications,such as Second Generation of Navigation System,Manned Spaceflight,Deep Space Missions,requirement on On-Board Computer(OBC) for higher performance has been arisen and normal OBCs are facing an upgrade of consume and rad-hard capability.Based on adaptive reconfiguration technology and System-on-Chip design method,this paper presented a reconfigurable tolerance method for MPSoC.High reliability and expansibility can be achieved at hardware level,which makes a great sense of space applications and military missions in future.After introducing the basic concepts of MPSoC and reconfigurable technique,several representative cases were presented as to show the development of reconfigurable processors.Then the basic infrastructure of our dynamic reconfigurable tolerance system was discussed.Moreover,tolerance strategy based on system degrading was presented in detail.A contrast analysis among single core,normal design and our method was provided.Besides,using leon3to implement the process elements,simulation validation of tolerance module efficiency was given out and the test results show the control mechanism works well.Finally,the future related works were discussed and the proposed reconfiguration tolerance method was concluded.

[1] Wolf W,et al.Multiprocessor System-on-Chip (MPSoC) Technology[J].IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,2008,7(10):1701-1713
[2] Steven D,Guertin M.System on a Chip Devices—FY10[R].JPL Publication,Dec.2010:10-20
[3] 张少林,杨孟飞,刘鸿瑾.空间应用SoC研究现状[J].航天标准化,2012,149(3):14-20
[4] Rafal G.Exploratory Study about the Use of New Reconfigurable FPGAs in Space[C]∥San Diego,CA,2011NASA/ESA Conference on Adaptive Hardware and Systems (AHS).Piscataway:IEEE Operations Center,2011:220-226
[5] Ivars S,et al.Flexible High-Performance PPC On-Board Com-puter Archticture Based On Silicon-On-Insulator Technology[C]∥Ivars S,Glauert W,Frickel J,et al.Flexible high-performance ppc on-board computer architecture based on silicon-on-insulator technology.58th International Astronautical Congress.Hyderabad,India,2007
[6] Tom F.Advanced Hybrid On-Board Science Data Processor-SpaceCube 2.0[C]∥Arlington,NASA/GSFC,ESTO Earth Science Technology Forum.June 2010
[7] John S.Space Cube to Debut in 2007[J].Goddard Tech Trends,2006,4(2):2-3
[8] Dan E,et al.SpaceCube On-Board Science Data Processor[C]∥Albuquerque,New Mexico,Military/Aerospace Programmable Logic Devices-2010.Nov.2010
[9] Bauer L,et al.Concepts,Architectures,and Run-time Systemsfor Efficient and Adaptive Reconfigurable Processors[C]∥AHS-2011.June 2011
[10] Harada T,et al.Evolving Complex Programs in Tierra-based On-Board Computer on UNITEC-1[C]∥IAC-10.2010
[11] 龚健.基于在线进化的硬件容错方法研究[D].北京:中国空间技术研究院,2010
[12] 尚利宏,周密,胡瑜.一种基于二阶近似域划分的可重构容错片上系统[C]∥第六届中国测试学术会议.2010:251-257
[13] Jiri G.A Portable and Fault-Tolerant Microprocessor Based on the SPARC V8Architecture[C]∥Proceedings.International Conference on dependable Systems and Networks.IEEE,Washington D C,2002:409-415

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