计算机科学 ›› 2025, Vol. 52 ›› Issue (11A): 250100075-7.doi: 10.11896/jsjkx.250100075
丁浪1, 罗庆斌1, 吕轶1, 郑圆梦2, 廖颢羽2
DING Lang1, LUO Qingbin1, LYU Yi1, ZHENG Yuanmeng2, LIAO Haoyu2
摘要： AES是当前最广泛使用的国际标准化分组密码算法,美国国家标准与技术研究院(NIST)将AES的量子安全强度作为评估后量子密码安全性的参考,因此实现AES算法的量子电路并分析其量子安全性已成为密码学研究的热点。然而,由于AES算法的量子电路实现需耗费数百个量子比特和数万个量子门,简化AES密码算法的量子电路实现与优化成为重要的研究方向。首先,在加密算法中,基于S盒查找表,利用DORCIS工具成功实现S盒的量子电路;其次,通过借用密钥中的一个量子比特,将该量子电路中具有3个控制位的CCCNOT门分解为4个Toffoli门,将使用的量子门控制在NCT门集内;然后,在移位操作中,通过置换变量的方式避免了加密算法中交换门的使用;最后,通过S盒查找表计算出了S盒的布尔表达式,设计并实现了密钥扩展中8量子比特的S盒量子电路。在此基础上优化了简化AES密码算法的量子电路,该量子电路的正确性在Qiskit Aer量子模拟器中得到了验证。量子资源分析结果表明,整体量子电路实现仅需32个量子比特、51个NOT门、220个CNOT门和120个Toffoli门。与已有研究相比,所提方法减少了量子资源的消耗,从而提升了简化AES算法量子电路的实现效率。
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