摘要： 访存指令的乱序执行会导致存储相关性冲突。存储相关性预测技术能够减少相关性冲突,提升处理器性能。已有学术研究工作普遍存在硬件开销大、实现复杂度高的不足；商业处理器中的存储相关性预测技术虽然实现简单,但又存在不具有自适应性或不利于利用指令并行性等问题。设计了一种简单、高效的存储相关性预测器SMDP,它具有自适应、易实现、充分利用指令并行性等优点。实验表明,SMDP能有效提高处理器性能,在与实际处理器接近的较小指令窗口配置下,与盲预测机制相比,平均性能提高0.7991%,最高可达4.9225%。
| [1] Doweck J．Inside Intel CoreTM Microarchitecture and SmartMemory Access[M]．Intel White Paper,2006 [2] Moshovos A,Breach S E,Vijaykumar T N,et al．Dynamic Speculation and Synchronization of Data Dependences[C]∥the Proceedings of the 24th Annual International Symposium on Computer Architecture (ISCA).1997 [3] Chrysos G Z,Emer J S.Memory dependence predictor usingstore-sets[C]∥Proceedings of the 25th Annual International Symposium on Computer Architecture (ISCA).1998 [4] Loh S S G H.Store Vectors for Scalable Memory Dependence Prediction and Scheduling[C]∥the Proceedings of the 12th International Symposium on High-Performance Computer Architecture(HPCA)．2006 [5] Onder S,Gupta R．Dynamic memory disambiguation in the pre-sence of out-of-order store issuing[C]∥Proceedings of the 32nd Annual ACM/IEEE International Symposium on Microarchitecture (MICRO)．1999 [6] Yoaz A,Erez M,Ronen R,et al.Speculation Techniques for Improving Load Related Instruction Scheduling[C]∥Proceedings of the 26th Annual International Symposium on Computer Architecture (ISCA).1998 [7] Kessler R E．The Alpha 21264Microprocessor Architecture[C]∥IEEE MICRO．1999 |
| No related articles found! |
|
||
首页