计算机科学 ›› 2016, Vol. 43 ›› Issue (Z11): 517-519.doi: 10.11896/j.issn.1002-137X.2016.11A.116
李东海,朱晓晨,范中磊,杨小军
LI Dong-hai, ZHU Xiao-chen, FAN Zhong-lei and YANG Xiao-jun
摘要： 为了实现多项式数据通路的高层次综合,采用有序的、简化的和正则的带权值广义表模型表达该多项式。提出了基于带权值广义表的优化方法,该方法以自顶向下的方式遍历带权值广义表中的节点,迭代地识别其相应的加法割和乘法割,进而形成一个可允许割序列；根据可允许割序列产生相应可调度的数据流图。实验结果表明,采用该方法得到的数据流图与已有方法得到的相比,在延迟上具有一定的优势。
| [1] Del Barrio A A,Hermida J C R.A Distributed Clustered Architecture to Tackle Delay Variations in Datapath Synthesis [J].IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems,2016,35(3):419-432 [2] Sierra R,Carreras C,Caffarena G.A Formal Method for Optimal High-Level Casting of Heterogeneous Fixed-Point Adders and Subtractors [J].IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems,2015,34(1):52-62 [3] Jin S,Kim D,Nguyen T T,et al.Design and Implementation of a Pipelined Datapath for High-Speed Face Detection Using FPGA[J].IEEE Transactions on Industrial Informatics,2012,8(1):158-167 [4] Zheng Hong-bin,Gurumani S T,Yang Li-wei,et al.High-Level Synthesis with Behavioral-Level Multicycle Path Analysis [J].IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems,2014,33(12):1832-1845 [5] Gupta S,Savoiu N,Dutt N,et al.Using global code motion to improve the quality of results in high level synthesis [J].IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems,2004,23(2):302-312 [6] Zilic Z,Karajica B.High-level Design of Integrated Microsystems-Arithmetic Perspective[C]∥Proceedings of International Symposium on Robotic and Sensors Environments (ROSE),2011.Montreal,Quebec,Canada,2011:77-82 [7] Sjovall P,Virtanen J,Vanne J,et al.High-Level Synthesis Design Flow for HEVC Intra Encoder on SoC-FPGA[C]∥Proceedings of Euromicro Conference on Digital System Design,2015.Funchal,Madeira,Portugal,2015:49-56 [8] Ghandali S,Alizadeh B,Navabi Z,et al.Polynomial DatapathSynthesis and Optimization Based on Vanishing Polynomial over Zm2 and Algebraic Techniques[C]∥Proceedings of International Conference on Formal Methods and Models for Codesign,2012.Arlington,Virginia,2012:65-73 [9] Ghandali S,Alizadeh B,Fujita M,et al.RTL Datapath Optimization Using System-level Transformations[C]∥Proceedings of International Symposium on Quality Electronic Design,2014.Santa Clara,CA,USA,2014:309-316 [10] Ghandali S,Alizadeh B,Fujita M,et al.Automatic High-Level Data-Flow Synthesis and Optimization of Polynomial Datapaths Using Functional Decomposition [J].IEEE Transaction on Computers,2015,64(6):1579-1593 [11] 李东海,马光胜,胡靖.高层次数据通路的等价性验证方法[J].哈尔滨工程大学学报,2008,29(6):583-588 [12] Andriamisaina C,Coussy P,Casseau E,et al.High-Level Synthesis for Designing Multimode Architectures[J].IEEE Tran-saction on Computer-Aided Design of Integrated Circuits and Systems,2010,29(11):419-432 |
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