计算机科学 ›› 2014, Vol. 41 ›› Issue (Z6): 114-117.

• 智能计算 • 上一篇    下一篇

多核处理器可重构Cache功耗计算方法的研究

方娟,陈欣   

  1. 北京工业大学计算机学院 北京100124;北京工业大学计算机学院 北京100124
  • 出版日期:2018-11-14 发布日期:2018-11-14
  • 基金资助:
    本文受国家自然科学基金(61202076),北京市教委科技计划面上项目(KM201210005022)资助

Research of Reconfigurable Cache Method for Power Calculation in CMP

FANG Juan and CHEN Xin   

  • Online:2018-11-14 Published:2018-11-14

摘要: 多核动态可重构Cache是解决Cache功耗困扰的一个重要方法。现有Cache功耗模拟器并不能很好地支持多核动态可重构Cache功耗研究,通过对多核动态可重构Cache的功耗模型进行研究,找到了计算可重构Cache的方法和思路,应用CACTI来分别构建各个组成结构的Cache功耗模型,以较为准确地测算可重构Cache的功耗。在Simics模拟器下构建动态可重构Cache,运行测试程序,对比传统的体系结构,可重构Cache的功耗能够得到10.4%的降低。同时,实验中发现功耗的降低不仅仅是动态可重构Cache贡献的,而是由系统综合产生的,因此在低功耗设计中,要综合考虑整体系统的功耗和性能,避免片面地考虑Cache结构而导致整体功耗的提高。

关键词: 多核处理器,动态重构,Cache,功耗 中图法分类号TP393文献标识码A

Abstract: Multicore dynamically reconfigurable Cache is an important way to solve the Cache-power troubled.Existing Cache-power simulator does not support multi-core dynamic reconfigurable Cache-power research, reconfigurable multi-core dynamic power consumption model of the Cache was researched to find the methods and ideas that can calculate reconstruction Cache. CACTI was used to build the structure of the various components Cache power model to more accurately estimate reconfigurable Cache-power.In Simics simulator,building dynamically reconfigurable Cache,running the test,comparing conventional architectures,reconfigurable Cache power consumption can be obtained a 10.4% decrease.Also it is found that the decrease in power consumption is more than just Dynamically Reconfigurable Cache contribution,but the contribution by the integrated system,prompting a comprehensive consideration of the overall system power consumption and performance in a low-power design,to avoid one-sided consideration of the Cache structure,leading to the improvement of the overall power consumption.

Key words: Multi-core,Reconfigurable,Cache,Power

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