Abstract: With the increasing improvement of the data transfer rates,the application of high speed interface is more and more widely used.Testing of high speed interface is difficult,and engineer’s experience plays the critical role in analyzing and diagnosing the fault type and location. Through the waveform morphology analysis of high-speed interface in the fault state,the corresponding relation between fault and fault waveform was determined and the cost of fault analysis was reduced.The experimental system in real PCIE IP core constructs logical structure between transmissions.Using the SPICE simulator,we simulated various fault waveforming morphology and forming the fault dictionary.

Key words: High-speed interface,Fault,Waveform,Analysis