Computer Science ›› 2010, Vol. 37 ›› Issue (7): 296-300.

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On-chip SRAM-based FTL Design for Solid-state Drive

XIE Chang-sheng,LI Bo,LU Chen,WANG Fen   

  • Online:2018-12-01 Published:2018-12-01

Abstract: There are a lot of issues of the SSD arising in the storage industry. This paper proposed a caching FTL design to improve the efficiency of the SSl)random write and reduce the amount of erasure operations by on-chip SRAM. By simulation experiments of SSDsim,we demonstrated the efficiency of our design. At the end of this paper,I gave my follow-up plan in this work.

Key words: Solid-state drive,曰'I,Erasure operations, Random writes

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