Abstract: An instruction replication scheme used in a fault-tolerant processor called RSED was introduced. The processor's fault tolerant mechanism mainly using temporal redundancy technique was implemented by modifying superscalar processor architecture. As an important function of the fault tolerant mechanism, instruction replication scheme was introduced in detail,and the issue of control-flow error checking implemented by utilizing instruction replication was also presented.

Key words: Fault tolerant,Temporal redundancy,Supcrscalar,Control-flow error