Computer Science ›› 2011, Vol. 38 ›› Issue (9): 279-281.
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LUO Li, HE Hong-jun , XU Wei-xia , DOU Qiang
Online:
Published:
Abstract: With the increasing number of clock domains and CDC signals in today's high-performance,low-power SOC,the design and verification of CDC problem become more and more important. Traditional verification methods can notfind a comprehensive cross-clock domain design of functional errors in the RTL stage. In this paper, we dicussed 5 types of CDC synchronizer circuit templates of our chip, and proposed hiberarchy verification method: structural analysis, assertion-based verification, and formal verification. Taped sample chip tests show all CDC designs work right, and demonstrate that design and verification method arc effective and complete.
Key words: Clock domain crossing design,Asscrtion-based verification,PSI_(Property Specification Language),Symbolie model checking,LTL logic
LUO Li, HE Hong-jun , XU Wei-xia , DOU Qiang. Design and Verification of Clock Domain Crossing for SOC[J].Computer Science, 2011, 38(9): 279-281.
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