计算机科学 ›› 2014, Vol. 41 ›› Issue (5): 50-54.doi: 10.11896/j.issn.1002-137X.2014.05.011
邬晟峰,吴悦,徐拾义
WU Sheng-feng,WU Yue and XU Shi-yi
摘要: 对超大规模集成电路进行随机测试的测试码之间的距离作了定量分析,在此基础上,改进了最大距离随机测试算法中测试码的生成方法,使得所生成的伪随机测试码集合同时达到最大海明距离与近似最大笛卡尔距离。因此每一个测试码可以尽可能多地独立检测到更多不重复的故障。进而提出了准完全最大距离测试新算法的思想和构建理论,并详细阐述了该算法的执行流程。在ISCAS'85基准电路上进行的大量实验数据分析表明,本方法确实有效地提高了随机测试效率,降低了随机测试成本。
[1] Bardell P H,McAnney W H,Savir J.Built-in test for VLSIpseudorandom Techniques [M].NY,USA:John Wiley & Sons,1987 [2] Dasgupta P,Chattopadhyay S,Chaudhuri P P,et al.Cellular automata-based recursive pseudoexhaustive test pattern generator[J].IEEE Transactions on Computers,2001,50(2):177-185 [3] Chaudhuri P P,Chowdhury D R,Nandi S,et al.Additive cellular automata:theory and applications[M].Los Alamitos,Calif.,USA:IEEE Computer Society Press,1997 [4] Wagner K D,Chin C K,McCluskey E J.Pseudorandom testing[J].IEEE Transactions on Computers,1987,C-36(3):332-343 [5] Chin C K,McCluskey E J.Test length for pseudorandom testing [J].IEEE Transactions on Computers,1987,C-36(2):252-256 [6] Dan L,Jone W B.Pseudorandom test-length analysis using differential solutions [J].IEEE Transactions on Computer-Aided D esign of Integrated Circuits and Systems,1996,15(7):815-825 [7] Seth S C,Agrawal V D,Farhat H.A statistical theory of digital circuit testability [J].IEEE Transactions on Computers,1990,39(4):582-586 [8] Majumdar A,Vrudhula S B K.Fault coverage and test lengthestimation for random pattern testing [J].IEEE Transactions on Computers,1995,44(2):234-247 [9] Pradhan D K,Chatterjee M.GLFSR-a new test pattern generator for built-in-self-test [J].IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,1999,18(2):238-247 [10] Pradhan D K,Kagaris D,Gambhir R.A Hamming distancebased test pattern generator with improved fault coverage[C]∥Proceedings of the IOLTS.French Riviera,France,2005:221-226 [11] Xu Shi-yi,Chen Jian-wen.Maximum distance testing[C]∥Proceedings of IEEE the 11th Asian Test Symposium (ATS’2002).Guam,USA,2002:15-20 [12] Xu Shi-yi.Orderly random testing for both hardware and sof-tware [C]∥Proceedings of 14th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC’2008).Taipei,Taiwan,2008:160-167 [13] Xu Shi-yi.A quasi best random testing[C]∥Proceeding of IEEE the 19th.Asian Test Symposium (ATS’2010).Shanghai,China,2010:21-26 [14] Hyung K L,Dong S H.HOPE:an efficient parallel fault simulator for synchronous sequential circuits [J].IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,1996,15(9):1048-1058 |
No related articles found! |
|