Computer Science ›› 2014, Vol. 41 ›› Issue (5): 24-26.doi: 10.11896/j.issn.1002-137X.2014.05.005

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Aging Path Reduction Algorithm for Type of Logic Gates

XING Lu,LIANG Hua-guo,YAN Lu-ming,ZHANG Li-na and YU Tian-song   

  • Online:2018-11-14 Published:2018-11-14

Abstract: As decrease of CMOS technology scaling of integrated circuit,the problems of circuit reliability are more serious,and the circuit aging caused by NBTI is especially conspicuous.In fact,most of circuits are complicated and there are many paths in a circuit.The workload will be large if we predict aging of all paths.In this work,we proposed an iterative algorithm based on types and number of logic gates on one path,which is used to reduce the protected circuit paths.The algorithm classifies all paths by the number of every kind of logic gate and different influence of logic gates types on circuit aging,then removes the secure path of which aging will not occur,lessens the workload of circuit aging prediction,and improves the efficiency of aging prediction.

Key words: Aging prediction,Critical path,Path reduction,Circuit reliability

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