Abstract: Subject to the core technology and intellectual property rights and other objective conditions,the research and development of domestic independent chip is highly restricted.RISC-V has the advantages of simplicity and modularity as an open source instruction set architecture(ISA),and it will become a new choice of domestic processor.As one of the most basic core software libraries of computer system,basic mathematics library is particularly important to the software ecological construction and healthy development of domestic processors.However,RISC-V has no relevant basic mathematics library at present.Therefore,this paper aims at porting basic mathematics library based on domestic Shenwei processor to the 64-bit RISC-V platform.In order to solve the problem of efficient transportation of the library,an automatic porting framework is designed at first,which can achieve high scalability through loose coupling between functional modules.Secondly,based on the characteristics of 64-bit RISC-V ISA,a global active register allocation method and a hierarchical instruction selection strategy are proposed.Finally,the framework is applied to bring about the transportation of some typical functions in the Shenwei basic mathematics library.Test results show that the ported functions are working correctly and the performance is improved compared with GLIBC.

Key words: Assembler, Automatic porting, Basic mathematic library, RISC-V