Computer Science

Computer Science ›› 2023, Vol. 50 ›› Issue (11A): 220800045-7.doi: 10.11896/jsjkx.220800045

• Computer Software & Architecture • Previous Articles     Next Articles

Lightweight Network Hardware Acceleration Design for Edge Computing

YU Yunjun1, ZHANG Pengfei1, GONG Hancheng2, CHEN Min2   

  1. 1 School of Information Engineering,Nanchang University,Nanchang 330000,China
    2 Jiangxi Jiangtou Digital Economy Research Institute,Nanchang 330000,China
  • Published:2023-11-09
  • About author:YU Yunjun,born in 1978,Ph.D,asso-ciate professor.His main research in-terests include fault diagnosis,active disturbance rejection control(ADRC),data-driven optimal control and its applications in microgrids,and low-carbon electricity technology.
  • Supported by:
    National International Science and Technology Cooperation Project(2014DFG72240) and Key R&D Program in Jiangxi Province(20214BBG74006).

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Abstract: With the increase of edge device data and the continuous application of neural networks,the rise of edge computing has shared the pressure on big data technologies with cloud computing as the core.Field programmable gate arrays(FPGAs) have shown excellent properties in edge computing and building neural network accelerators due to their flexible architecture and low power consumption.But traditional FPGA solutions based on traditional convolution algorithms are often limited by the number of on-chip computing units.In this paper,Zynq is used as a hardware acceleration platform,to quantize parameters at a fixed point,and array partitioning is used to improve pipeline running speed.The Winograd fast convolution algorithm is used to improve the traditional convolution,and the multiplication operation in the convolution operation is converted into an addition operation,which reduces the computational complexity of the model.The computational performance of the designed accelerator is greatly improved.Experiments show that XC7Z035 can achieve 43.5GOP/s performance under 150 MHz clock,and the energy efficiency is 129 times of Xeon(R) Silver 4214R and 159 timesof dual-core ARM.The proposedsolution is limited in resources and power consumption.It can provide high performance and is suitable for the landing application of lightweight neural networks at the edge of the network.

Key words: Edge computing, Hardware acceleration, Lightweight convolutional neural networks, Winograd, FPGA

CLC Number: 

  • TP391
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