Abstract: Nowadays, more and more general-purpose microprocessors provide enhanced SIMD instruction-set extensions to exploit data level parallelism. However, some inherent characteristics of applications and algorithms, such as memory address nonalignment, inconsecutive memory access and control flow, etc.，make compilers or programmers have to use permutation instruction to reorganize the element of vectors to get correct operands for SIMI)instructions.And these redundant permutation instructions had become the performance bottleneck of exploiting data level parallelism. hhis paper proposed an automatic data permutation generation and optimization algorithm. It can effectively reduce the performance loss caused by permutation instruction. The algorithm is based on a new intermediate representation,which contains enough address message of the operand, with which the problem of data permutation generation and optimization can be solved via identifying and eliminating all conflict edges in data flow graphs with minimal costs. The test result to a group of typical multimedia program shows that the algorithm can achieve performance acceleration up to 7% on the average.

Key words: Data permutation,Intermediate representation,Conflict edge