Abstract: Scaling-free CORDIC algorithm is well known by its ability of calculating special function. Its limited range of convergence and lower speed are an important drawback. There is still some progress to make, although some new version has been proposed. Comparing with modified original scaling-free CORDIC algorithm, our proposed algorithm can virtually converge to a bigger range, because of adding a correction iteration, what is more, accelerate computation though parallelization. After simulation and synthesizing,we can obtain some new architectures which are able to reach one clock lower latency and a 25.5% reduction in area and 35% reduction in power consumption compared to the modified original scaling-free architecture.

Key words: CORDIC algorithm, Low-latency, Low-consumption, Scaling-free