Abstract: One of software pipelined loop buffer was designed.It is used to store and dispatch instructions of loop body,reduce the times of accessing memory when executing loop programs,thereby reducing the influence of memory access latency on performance.Based on the study of software pipeling and loop unrolling,the design of software pipelined loop buffer was finished．The loop buffer has storage for up to 11232-bit instructions.The special instructions of loop buffer are used to control the operation of loop programs．Numerical simulation was performed for the design.Using the design complier,analysis was also conducted for the design.

Key words: Software pipelining,Loop buffer,Modulo scheduling,Memory access latency