Computer Science ›› 2013, Vol. 40 ›› Issue (7): 19-23.

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Survey of Helper Thread Prefetching

ZHANG Jian-xun and GU Zhi-min   

  • Online:2018-11-16 Published:2018-11-16

Abstract: Helper thread prefetching is one of the key techniques to improve the prefetch effect of non-irregular data intensive applications.It has become a hot research topic at all over the world in recent years.Aiming at the memory access characteristic of discontinuous locality of non-irregular data intensive applications,helper threading could effectively convert discontinuous locality into continuous-instant spatial or temporal locality by using the shared LLC of CMP platform.And as a result,the application’s performance can be improved.In this paper,the classification of helper thread prefetching techniques was summarized from the perspective of implementation method.The limitation and superiority of different types of prefetching were compared and surveyed.The current helper thread prefetching control policy was systematically analyzed and compared.Finally,several major issues and research directions of helper thread prefetching for further exploration were also pointed out.

Key words: Helper thread,Data prefetching,CMP platform,Non-irregular data intensive application

[1] Bryant R E.Data-Intensive Supercomputing:The case for DISC[EB/OL].http://www.cs.cmu.edu/~bryant,2012-12-13
[2] 谭光明.非规则计算中的局部性和并行性[D].北京:中国科学院计算技术研究所,2008
[3] Annavaram M,Patel J M,Davidson E S.Data prefetching by de-pendence graph pre-computation[A]∥Proceedings of the 28th Annual International Symposium on Computer Architecture(Goteborg,Sweden),2001[C].New York:ACM,2001:52-61
[4] Collins J D,Tullsen D M,Wang H,et al.Dynamic speculative precomputation[A]∥Proceedings of the 34th International Symposium on Microarchitecture (Austin,Tex.),2001[C].New York:ACM,2001:306-317
[5] Collins J D,Wang H,Tullsen D M,et al.Speculative precomputation:Long-range prefetching of delinquent loads[A]∥Proceedings of the 28th Annual International Symposium on Computer Architecture (Goteborg,Sweden),2001[C].New York:ACM,2001:14-25
[6] Liao S S W,Wang P H,Wang H,et al.Post-pass binary adaptation for software-based speculative precomputation[A]∥Proceedings of the ACM SIGPLANConference on Programming Language Design and Implementation (Berlin,Germany),2002[C].New York:ACM,2002:117-128
[7] Kim D ,Yeung D.Design and evaluation of compiler algorithms for pre-execution[A]∥Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems (San Jose,Calif.),2002[C].New York:ACM,2002:159-170
[8] Luk C-K.Tolerating Memory Latency through software-con-trolled pre-execution in simultaneous multithreading processors[A]∥Proceedings of the 28th Annual International Symposium on Computer Architecture (Goteborg,Sweden),2001[C].New York:ACM,2001:40-51
[9] Moshovos A,Pnevmatikatos D N,Baniasadi A.Slice-processors:An implementation of operation-based prediction[A]∥Procee-dings of the International Conference on Supercomputing (Sorrento,Italy),2001[C].New York:ACM,2001:321-334
[10] Roth A,Sohi G S.Speculative data-driven multithreading[A]∥Proceedings of the 7th International Conference on High Performance Computer Architecture (Monterrey,Mexico),2001[C].Los Alamitos,Calif:IEEE Computer Society Press,2001:191-202
[11] Roth A,Sohi G S.A quantitative framework for automated pre-execution thread selection[A]∥Proceedings of the 35th Annual International Symposium on Microarchitecture (Istanbul,Turkey),2002[C].New York:ACM,2002:430-441
[12] Zilles C B,Sohi G.Execution-based prediction using speculative slices[C]∥Proceedings of the 28th Annual International Symposium on Computer Architecture (Goteborg,Sweden),2001.New York:ACM,2001:2-13
[13] Collins J D,Tullsen D M,Wang Hong,et al.Dynamic Speculative Precomputation[A]∥Proceedings of the 34th International Symposium on Microarchitecture(MICRO’01),2001[C].New York:IEEE,2001:306-317
[14] Dubois M,Song Y.Assisted Execution[R].University ofSouthern California,October 1998
[15] Smith J E.Decoupled access/execute computer architectures[A]∥Proc.of the 9th Int.Symp.on Comp.Arch.(ISCA-9),1982[C].Los Alamitos:IEEE,1982:112-119
[16] Ganusov I,Burtscher M.Future Execution:A PrefetchingMechanism that Uses Multiple Cores to Speed up Single Threads[J].ACM Transactions on Architecture and Code Optimization,2006,4(3):424-449
[17] Byna S,Chen Yong,Sun Xian-he.A Taxonomy of Data Pre-fetching Mechanisms[J].Journal of Computer Science and Technology,2009,24(3):405-417
[18] Rui Hou,Zhang Long-bing,Hu Wei-wu.Accelerating sequentialprograms on Chip Multiprocessors via Dynamic Prefetching Thread[J].Microprocesors and Microsystems,2007(31):200-211
[19] Lu Ji-wei,Das A,Hsu W-C,et al.Dynamic Helper ThreadedPrefetching on the Sun UltraSparc CMP Processor[A]∥Proc.38th Ann.IEEE/ACM Int’l Symp.Microarchitecture(MICRO ’05),2005[C].New York:ACM,2005:93-104
[20] Zhang Wei-feng,Calder B,Tullsen D M.A Self-Repairing Prefetcher in an Event-Driven Dynamic Optimization Framework[A]∥IEEE Proceedings of the International Symposium on Code Generation and Optimization(CGO’06)[C].2006
[21] Luo Yang-chun,Packirisamy V,Hsu Wei-Chung,et al.Dynamic Performance Tuning for Speculative Threads[A]∥Proc.of the 36th Int.Symp.on Comp.Arch.(ISCA-09)[C].2009
[22] Kim D,Liao S S-W,Wang P H,et al.Physical Experimentation with Prefetching Helper Threads on Intel’s Hyper-Threaded Processors[A]∥Proceedings of the International Symposium on Code Generation and Optimization[C].Mar.2004
[23] Jung C,Lim D,Lee Jaejin,et al.Helper Thread Prefetching forLoosely-Coupled Multiprocessor Systems[A]∥IPDPS[C].2006
[24] Lee J,Jung C,Lim D,et al.Prefetching with Helper Threads forLoosely Coupled Multiprocessor Systems[J].IEEE Transactions on Parallel and Distributed Systems,2009,20(9):1309-1324
[25] Lyle J,Wallace D,Graham J,et al.Unravel:A CASE Tool to Assist Evaluation of High Integrity Software[EB/OL].http://hissa.ncsl.nist.gov/publications/nistir5691/vol1/,2012-08-15
[26] Song Yong-hong,Kalogeropulos S,Tirumalai P.Design and Implementation of A Compiler Framework for Helper Threading on Multi-Core Processors[A]∥Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques (PACT’05)[C].2005
[27] Zhang Jian-xun,Gu Zhi-min,et al.Performance Evaluation ofdata-push Thread on Commercial CMP Platform[A]∥Procee-dings of the International Network Computing Conference[C].Korea,2010
[28] Gu Zhi-min,Zheng Ning-han,Zhang Yi,et al.The Stable Conditions of a Task-Pair with Helper-Thread in CMP[A]∥Procee-dings of the International Conference on Parallel and Distributed Processing Techniques and Applications,2009.Las Vegas,Nevada,USA:IEEE,2009:125-130
[29] Gu Z,Fu Y,Zheng N,et al.Improving Performance of the Irreg-ular Data Intensive Application with small workload for CMPs[A]∥ International Conference on Parallel Processing Workshops[C].Taiwan,China,2011
[30] Zhang J,Gu Z.Exposing the Shared Cache Behavior of Helper Thread on Commercial CMP Platforms[A]∥11th International Symposium on Pervasive Systems,Algorithms,and Networks.Dalian,China (I-SPAN’2011)[C].2011
[31] Huang Y,Tang J,et al.The Performance Optimization ofThreaded Prefetching for Linked Data Structures[J].Intern.Journal of Parallel Programming,2011,4(20):141-163
[32] Huang Y,Gu Z,et al.Reducing cache pollution of threaded prefetching by controlling prefetch distance[A]∥Proc.IPDPS[C].2012
[33] Zhang J,Gu Z,et al.Solving Prameter Selection Problem ofHelper Thread Prefetching via Realtime Hardware Performance Monitoring[A]∥13th International Conference on Parallel and Distrbuted Computing,Applications and Technologies(PDCAT2012)[C].2012

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