Computer Science ›› 2013, Vol. 40 ›› Issue (9): 44-50.

Previous Articles     Next Articles

Similarity-driven Fine-grained Parallel Task Reconfigurable Algorithm

HAO Shui-xia,ZENG Guo-sun,MA Xiao-xin and XU Jin-chao   

  • Online:2018-11-16 Published:2018-11-16

Abstract: Heterogeneous computing is a novel trend of high-performance technology.Mismatch between parallel tasks and architecture leads to realize high performance hardly.Reconfiguration technique brings an opportunity for it.In order to realize their matching,this paper provided similarity-driven reconfigurable algorithm.Firstly the paper gave definitions of graph-similarity and graph-reconfiguration.Secondly through building a measurement between task graph and fixed architecture,the paper provided a graph-reconfiguration problem and a similarity-driven reconfigurable algorithm.The algorithm includes three processes:nodes-fused,node_edge_reconfiguration and node_edge_refined.Finally the paper gave a test on Greenwich benchmark with the typical architecture.The results show that the algorithm can realize the optimal match between the parallel tasks and the architectures on heterogeneous computing.

Key words: Parallel task graph,Architecture,Heterogeneous computing,Similarity-driven,Reconfiguration

[1] Kernighan B W,Lin S.An efficient heuristic for partitioning graphs[J].Bell System Technology Journal,1970,49:291-308
[2] Hendrickson B,Leland R.A multilevel algorithm for partitioning graphs[C]∥Proceedings of the ACM/IEEE Supercompu-ting Conference.1995:626-657
[3] Walshaw C,Cross M.Multilevel mesh partitioning for heterogeneous communication networks[J].Future Generation Compu-ter System,2001,17(5):601-623
[4] Schloegel K,Karypis G.Wavefront diffusion and LMSR:algo-rithms for dynamic repartitioning of adaptive meshes.Multilevel k-way partitioning scheme for irregular graphs[J].IEEE Tran-sactions on Parallel and Distributed Systems,2001,12(5):451-466
[5] Need C,Wehn N.Designing efficient irregular networks for hete-rogeneous system-on-chip[J].Journal of System Architecture,2008,54(2):384-396
[6] Bambha N K,Bhattacharyya S S.Joint application mapping/interconnect synthesis techniques for embedded chip-scale mutliprocessors[J].IEEE transaction on parallel and distributed systems,2005,6(8):99-112
[7] Kramer R,Gupta R,Soffa M L.The combining DAG:a technique for parallel data flow analysis[J].IEEE Transactions on Parallel and Distributed Systems,1994,5(8):805-813
[8] 沈轶伟,曾国荪.异构计算中一种图的非均衡划分算法[J].计算机科学,2006,3(6):260
[9] Selvakkumaran N,George K.Multiobjective hypergraph parti-tioning algorithms for cut and maximum subdomain-degree mi-nimization[J].IEEE Transactions on Computer Aided Design of Intergrated Circuits and System,2006,5(3):504-512
[10] Karypis G,Kumar V.Multilevel k-way partitioning scheme for irregular graphs[J].Journal of Parallel Distribution Computer,1998,8(1):96
[11] Verbauwhede I,Schaumont P.The happy marriage of architecture and application in next-generation reconfigurable systems[C]∥Proceedings of the 1st conference on computing frontiers.Ischia,Italy,2004:363-376
[12] Moulitsas I,Karypis G.Architecture aware partitioning algo-rithms[C]∥Proceedings of the 8th international conference on Algorithms and Architectures for Parallel Processing.Agia Napa,Cyprus.,2008:42-53

No related articles found!
Viewed
Full text


Abstract

Cited

  Shared   
  Discussed   
No Suggested Reading articles found!