Computer Science ›› 2025, Vol. 52 ›› Issue (5): 41-49.doi: 10.11896/jsjkx.241200053

• High Performance Computing • Previous Articles     Next Articles

Metrics and Tools for Evaluating the Deviation in Parallel Timing

LIAO Qiucheng1, ZHOU Yang2, LIN Xinhua1   

  1. 1 Center for High-Performance Computing,Shanghai Jiao Tong University,Shanghai 200240,China
    2 Science and Technology Department of Zhejiang Province,Hangzhou 310006,China
  • Received:2024-12-09 Revised:2025-02-18 Online:2025-05-15 Published:2025-05-12
  • About author:
    LIAO Qiucheng,born in 1994,engineer,is a member of CCF(No.P6171M).His main research interests include high-performance computing and so on.
    LIN Xinhua,born in 1979,Ph.D,senior engineer,Ph.D supervisor,is a distinguished member of CCF(No.23737D).His main research interests include high-performance computing and so on.
  • Supported by:
    National Natural Science Foundation of China(62072300).

Abstract: In parallel computing,instrumenting specific code segments is commonly used for performance evaluation on multicore processors.However,factors such as timing methods,hardware configurations,and runtime environments affect parallel timing accuracy,jeopardizing stability and reproducibility of performance measurements.As the core number of multicore processors grows,accurate parallel timing has grown more challenging.Two key problems remain:1)current method cannot quantitatively compare the accuracy of different timing methods;2)the root cause of parallel timing variability is not fully understood.This paper proposes metrics for evaluating the deviation in measurements and presents ParTES,a tool which emulates realistic cache conditions and timing intervals on X86 and Armv8 CPUs,allowing quantitative evaluation of timing variability across different timing methods.This study performed microsecond-level and millisecond-level analyses of parallel timing deviations on Kunpeng,Phytium,and Hygon processors.The results show that the performance of timing methods,cache status,nearby instructions,and server hardware configurations all influence accuracy is excellent.Among these CPUs,the most stable timing methods are PAPIon Kunpeng,POSIX's clock_gettime on Phytium,and the RDTSC instruction on Hygon.

Key words: High performance computing, Parallel computing, Performance evaluation, Performance analysis, Error analysis

CLC Number: 

  • TP302
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