Computer Science

Computer Science ›› 2023, Vol. 50 ›› Issue (11): 374-382.doi: 10.11896/jsjkx.221100070

• Information Security • Previous Articles    

ZUC High Performance Data Encryption Scheme Based on FPGA

ZHANG Bolin1,2, LI Bin1,2, YAN Yunfei1, WEI Yuanxin1, ZHOU Qinglei1   

  1. 1 Country School of Computer and Artificial Intelligence,Zhengzhou University,Zhengzhou 450001,China
    2 Henan Key Laboratory of Network Cryptography Technology,Zhengzhou 450001,China
  • Received:2022-11-09 Revised:2023-03-29 Online:2023-11-15 Published:2023-11-06
  • About author:ZHANG Bolin,born in 1999,master.His main research interests include high-performance computing and information security.LI Bin,born in 1986,Ph.D,lecturer.His main research interests include high-performance computing and information security.
  • Supported by:
    Henan Key Laboratory of Network Cryptography Technology(LNCT2022-A14) ,National Key R & D Program of China(2018XXXXXXX01) and Key Scientific and Technological Project of Henan Province(232102211055).

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Abstract: ZUC algorithm is a stream cipher algorithm independently developed by China,which has been adopted as the fourth generation mobile communication encryption standard by 3GPP LTE.In order to meet the high requirements of the big data era for the performance of domestic passwords,a set of high-performance data encryption scheme with ZUC algorithm as the core is designed.The scheme includes two encryption algorithm cores of different structure forms.Aiming at two different application situations of short message and long message respectively,based on the FPGA platform,the semi-pipelined and full-pipelined ZUC stream cipher circuit structures are designed by using CLA and CSA adders.With the improved ZUC encryption mode,combined with high-speed memory communication and multi iv parallel encryption,the high-performance encryption scheme is realized,which greatly improves the encryption and decryption efficiency.When the scheme works,the encryption algorithm can be configured using the control module.Experimental results show that,compared with other schemes,the working frequency of the proposed algorithmis increased by 40.8%~209.5% and 62.1%~445.4% respectively,and the data throughput reaches 25.728 Gb/s and 46.08 Gb/s,meeting the high-performance encryption scenarios such as edge devices and Internet of Vehicles data encryption.

Key words: ZUC algorithm, FPGA, High performance encryption, Hardware implementation, Pipelined

CLC Number: 

  • TP309
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